AI has moved the centre of gravity in chip design, and a small Shenzhen-Dawan firm intends to ride it.
SunZhan, founded in 2022 with about twenty people, bets on domain-specific architecture, supplying custom CPU, DSP and NPU cores on RISC-V. Founder Zeng Yi, two decades in the industry, argues the general-purpose processor no longer meets the needs of modern chips and algorithms.
When the model decides the architecture
Zeng’s core claim is stark: AI has broken the old order. Previously a chip firm decided the architecture and everyone coded to it; now the AI model decides the architecture. Different models need wildly different compute, and a single general CPU no longer serves them efficiently. Vector units and tensor units matter more, which is why Intel is hit and ARM’s importance slips. RISC-V wins precisely because its open, modifiable nature lets each firm build the custom instructions its model needs; Qualcomm and Tesla have acquired RISC-V firms, and Google, Meta and even Intel have deep partnerships.
The biggest catalyst, he says, is that AI is platformising chip design. Where five or ten years ago a small firm attempting a CPU was unthinkable, SunZhan shipped a new CPU in two months using AI in its engine. It now likens its code-generation engine to “Claude Code for processors”, using AI to help users auto-generate DSA processors. AI, in his words, has torn down a wall once thought too high to climb.
Demand, not elegance, decides
Asked what makes an architecture succeed, Zeng returns to market demand. Von Neumann won not on technical merit but on post-war military demand and US adoption. ARM won on phones’ extreme power sensitivity. RISC-V rises on AI, customisation and specialisation together. Domestically he sees two paths: server RISC-V, loud but slow to monetise, and DSA, faster to land, where more firms now pour in.
On a stable three-way split with x86 and ARM, he is candid that RISC-V needs a spark, and it will not come from frontal attack on old markets but from riding the AI wave, just as ARM caught the phone.
Fragmentation is not a dirty word
Zeng reframes fragmentation as differentiation. ARM’s uniformity meant homogenous chips built on the same licensed blueprint; RISC-V’s flexibility lets a client gain a distinct instruction set and patent it. The risk is real, custom instructions need rare expertise and poor compiler support hurts compatibility, so unified test standards matter. SunZhan answers with a high-level tool platform: clients define the top architecture, and compiler, code and verification are auto-generated, keeping the upside while damping the risk.
Two frontiers
The first is full AI-isation of custom tools, the firm’s most urgent push, to become the semiconductor “Copilot” that auto-generates processor schemes, in talks with a known local research institute. The second is “anti-fragmentation”: after many bespoke projects it is distilling common platforms, what it calls “pre-made dishes”, graded plans at under 1T, 20 to 50T and 100 to 200T compute, and industrial DSP cores to rival Texas Instruments’ lines.
SunZhan’s first-half revenue already matches full-year 2025, and the full year could double. It recently opened a DSA compute lab in Shanghai Pudong under the RISC-V committee’s guidance. Zeng’s ambition is to lead the DSA field, and he plans an overseas push within two years. As for when RISC-V truly stands in high-performance compute, he gives a five-year window for a credible technical path, but notes ARM itself still holds a small server share, a step RISC-V cannot skip.
Editor’s note: This is an adapted translation of the original Leiphone report. It has been trimmed and restructured for readability for an international business audience.